Béla Fehér

Publication Activity (10 Years)

Years Active: 1993-2011
Publications (10 Years): 0

Publications

Imre Pechan, Béla Fehér
Molecular Docking on FPGA and GPU Platforms. FPL (2011)
Béla Fehér, Tamás Raikovich, György Dancsi, Péter Laczkó
LOGSYS: A simple tool for complex student projects. MSE (2009)
Péter Szántó, Gábor Szedö, Béla Fehér
High-Performance Timing-Driven Rank Filter. VLSI Design 2008 (2008)
Péter Szántó, Béla Fehér, Gábor Szedö
High Performance Timing-Driven Rank Filter. ICECS (2006)
Ákos Lédeczi, Gergely Kis, Béla Fehér, Péter Völgyesi, György Balogh
Acoustic Source Localization Fusing Sparse Direction of Arrival Estimates. WISES (2006)
Mark F. St. John, Harvey S. Smallman, Daniel I. Manes, Béla Fehér, Jeffrey G. Morrison
Heuristic Automation for Decluttering Tactical Displays. Hum. Factors 47 (3) (2005)
Péter Szántó, Béla Fehér
High performance visibility testing with screen segmentation. ESTIMedia (2004)
Régis Leveugle, Lörinc Antoni, Béla Fehér
Dependability Analysis: A New Application for Run-Time Reconfiguration. IPDPS (2003)
Péter Szántó, Béla Fehér
3D rendering using FPGAs. VLSI-SOC (2003)
Lörinc Antoni, Régis Leveugle, Béla Fehér
Using run-time reconfiguration for fault injection applications. IEEE Trans. Instrum. Meas. 52 (5) (2003)
Lörinc Antoni, Régis Leveugle, Béla Fehér
Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes. DFT (2002)
Tamás Szabó, Lörinc Antoni, Gábor Horváth, Béla Fehér
A Full-Parallel Digital Implementation for Pre-Trained NNs. IJCNN (2) (2000)
Lörinc Antoni, Régis Leveugle, Béla Fehér
Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes. DFT (2000)
Béla Fehér, Gábor Szedö
Cost Effective 2×2 Inner Product Processors. FPL (1998)
Tamás Szabó, Béla Fehér, Gábor Horváth
Neural network implementation using distributed arithmetic. KES (3) (1998)
Béla Fehér
Efficient synthesis of distributed vector multipliers. Microprocess. Microprogramming 38 (1-5) (1993)