Arturo Díaz-Pérez

Publication Activity (10 Years)

Years Active: 2003-2009
Publications (10 Years): 0

Publications

Oscar Alvarado Nava, Arturo Díaz-Pérez
Acceleration of Fractal Image Compression Using the Hardware-Software Co-design Methodology. ReConFig (2009)
Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
A reconfigurable processor for high speed point multiplication in elliptic curves. Int. J. Embed. Syst. 1 (3/4) (2005)
Emmanuel López-Trejo, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
An FPGA Implementation of CCM Mode Using AES. ICISC (2005)
Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
A Parallel Architecture for Fast Computation of Elliptic Curve Scalar Multiplication over GF(2^m). IPDPS (2004)
Francisco Rodríguez-Henríquez, Nazar Abbas Saqib, Arturo Díaz-Pérez
). Microprocess. Microsystems 28 (5-6) (2004)
Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
A Parallel Architecture for Computing Scalar Multiplication on Hessian Elliptic Curves. ITCC (2) (2004)
Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
AES Algorithm Implementation-An efficient approach for Sequential and Pipeline Architectures. ENC (2003)
Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core. FPL (2003)