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Amit Agarwal
Publication Activity (10 Years)
Years Active: 2016-2016
Publications (10 Years): 2
Top Topics
Automatic Analysis
Multi Core Architecture
Quantitative Analysis
Low Overhead
Top Venues
ESSCIRC
VLSI Design
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Publications
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Girish Pahwa
,
Tapas Dutta
,
Amit Agarwal
,
Yogesh Singh Chauhan
Designing energy efficient and hysteresis free negative capacitance FinFET with negative DIBL and 3.5X ION using compact modeling approach.
ESSCIRC
(2016)
Chandan Yadav
,
Amit Agarwal
,
Yogesh Singh Chauhan
Analysis of Quantum Capacitance Effect in Ultra-Thin-Body III-V Transistor.
VLSI Design
(2016)