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Akshay Muraleedharan
Publication Activity (10 Years)
Years Active: 2019-2020
Publications (10 Years): 2
Top Topics
Fpga Device
Instruction Set Architecture
Systolic Array
Parallel Architecture
Top Venues
VLSI Design
DSD
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Publications
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T. Gokulan
,
Akshay Muraleedharan
,
Kuruvilla Varghese
Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA.
DSD
(2020)
Kundan Kumar
,
Raghunath K. P
,
Akshay Muraleedharan
,
Javed S. Gaggatur
,
Gaurab Banerjee
A 75-µW 2.4 GHz Wake-up Receiver in 65-nm CMOS for Neonatal Healthcare Application.
VLSI Design
(2019)