Akio Nakata

Publication Activity (10 Years)

Years Active: 1993-2018
Publications (10 Years): 1

Top Topics

Real Time Database Systems

Scheduling Algorithm

Resource Constraints

Significantly Reduced

Top Venues

Publications

Yuki Machigashira, Akio Nakata
An Improved LLF Scheduling for Reducing Maximum Heap Memory Consumption by Considering Laxity Time. TASE (2018)
Tadaaki Tanimoto, Seiji Yamaguchi, Akio Nakata, Teruo Higashino
A real time budgeting method for module-level-pipelined bus based system using bus scenarios. DAC (2006)
Akio Nakata, Tadaaki Tanimoto, Suguru Sasaki, Teruo Higashino
A Timed Failure Equivalence Preserving Abstraction for Parametric Time-interval Automata. Int. J. Found. Comput. Sci. 17 (4) (2006)
Takaaki Umedu, Shigeharu Urata, Akio Nakata, Teruo Higashino
Automatic Decomposition of Java Program for Implementation on Mobile Terminals. AINA (2005)
Tadaaki Tanimoto, Akio Nakata, Hideaki Hashimoto, Teruo Higashino
Double Depth First Search Based Parametric Analysis for Parametric Time-Interval Automata. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2005)
Tadaaki Tanimoto, Suguru Sasaki, Akio Nakata, Teruo Higashino
A Global Timed Bisimulation Preserving Abstraction for Parametric Time-Interval Automata. ATVA (2004)
Takanori Mori, Akio Nakata, Teruo Higashino
A Method for Designing Multimedia Protocols using Both Parametric Model Checking and Functional Testing. Stud. Inform. Univ. 3 (2) (2004)
Tomoya Kitani, Yoshifumi Takamoto, Keiichi Yasumoto, Akio Nakata, Teruo Higashino
A Flexible and High-Reliable HW/SW Co-Design Method for Real-Time Embedded Systems. RTSS (2004)
Takanori Mori, Hirotaka Otsuka, Nobuo Funabiki, Akio Nakata, Teruo Higashino
A test sequence generation method for communication protocols using the SAT algorithm. Systems and Computers in Japan 34 (11) (2003)
Tomoya Kitani, Yoshifumi Takamoto, Isao Naka, Keiichi Yasumoto, Akio Nakata, Teruo Higashino
Design and Implementation of Priority Queuing Mechanism on FPGA Using Concurrent Periodic EFSMs and Parametric Model Checking. FPL (2003)
Masayuki Kirimura, Yoshifumi Takamoto, Takanori Mori, Keiichi Yasumoto, Akio Nakata, Teruo Higashino
Design and Implementation of FPGA Circuits for High Speed Network Monitors. FPL (2002)
Keiichi Yasumoto, Takaaki Umedu, Hirozumi Yamaguchi, Akio Nakata, Teruo Higashino
Protocol animation based on event-driven visualization scenarios in real-time LOTOS. Comput. Networks 40 (5) (2002)
Takaaki Umedu, Yoshiki Terashima, Keiichi Yasumoto, Akio Nakata, Teruo Higashino, Kenichi Taniguchi
A Language for Describing Wireless Mobile Applications with Dynamic Establishment of Multi-way Synchronization Channels. FME (2002)
Makoto Yamada, Takanori Mori, Atsushi Fukada, Akio Nakata, Teruo Higashino
A Method for Functional Testing of Media Synchronization Protocols. ICOIN (2) (2002)
Atsushi Fukada, Akio Nakata, Junji Kitamichi, Teruo Higashino, Ana R. Cavalli
A Conformance Testing Method for Communication Protocols Modeled as Concurrent DFSMs. ICOIN (2001)
Akio Nakata, Teruo Higashino
Deriving Parameter Conditions for Periodic Timed Automata Satisfying Real-Time Temporal Logic Formulas. FORTE (2001)
Teruo Higashino, Akio Nakata, Kenichi Taniguchi, Ana R. Cavalli
Generating Test Cases for a Timed I/O Automaton Model. IWTCS (1999)
Akio Nakata, Teruo Higashino, Kenichi Taniguchi
Protocol Synthesis from Context-Free Processes Using Event Structures. RTCSA (1998)
Akio Nakata, Teruo Higashino, Kenichi Taniguchi
Time-Action Alternating Model for Timed LOTOS and its Symbolic Verification of Bisimulation Equivalence. FORTE (1996)
Akio Nakata, Teruo Higashino, Kenichi Taniguchi
Protocol synthesis from timed and structured specifications. ICNP (1995)
Teruo Higashino, Akio Nakata, Tatsuo Itoh, Kenichi Taniguchi
Verification of Liveness Property for Communicating FSM's with Conditional Transitions Depending on State Visiting Numbers. FORTE (1995)
Akio Nakata, Teruo Higashino, Kenichi Taniguchi
LOTOS enhancement to specify time constraint among non-adjacent actions using first order logic. FORTE (1993)