Abhishek Bandyopadhyay

Publication Activity (10 Years)

Years Active: 2002-2022
Publications (10 Years): 4

Top Topics

Routing And Wavelength Assignment

Noise Reduction

Top Venues

Int. J. Parallel Emergent Distributed Syst.

Publications

Naoaki Nishimura, Atsushi Matamura, Preston Birdsong, Shaolong Liu, Abhishek Bandyopadhyay, Mariana T. Markova, Rajeev Morajkar
Common-mode Stable Multilevel Output Stage with EMI Reduction Feedback Loop for Class-D audio Amplifier. VLSI Technology and Circuits (2022)
Atsushi Matamura, Naoaki Nishimura, Preston Birdsong, Abhishek Bandyopadhyay, Adam Spirer, Mariana T. Markova, Shaolong Liu
An 82-mW ΔΣ-Based Filter-Less Class-D Headphone Amplifier With -93-dB THD+N, 113-dB SNR, and 93% Efficiency. IEEE J. Solid State Circuits 56 (12) (2021)
Atsushi Matamura, Naoaki Nishimura, Preston Birdsong, Abhishek Bandyopadhyay, Adam Spirer, Mariana T. Markova, Shaolong Liu
31.1 An 82mW ΔΣ - Based Filter-Less Class-D Headphone Amplifier with -93dB THD+N, 113dB SNR and 93% Efficiency. ISSCC (2021)
Vishal Dey, Abhishek Bandyopadhyay, Uma Bhattacharya, Monish Chatterjee
An offline scheme for reducing cost of protection in all-optical WDM mesh networks with fast recovery. Int. J. Parallel Emergent Distributed Syst. 34 (5) (2019)
John McNeill, Abhishek Bandyopadhyay
Session 18 - Data converter techniques. CICC (2015)
Abhishek Bandyopadhyay, Mohtasham Raghib, Uma Bhattacharya, Monish Chatterjee
Dynamic survivable traffic grooming with effective load balancing in WDM all-optical mesh networks. ICACCI (2014)
Abhishek Bandyopadhyay, Robert Adams, Khiem Nguyen, Paul Baginski, David Lamb, Thomas Tansley
A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC. VLSIC (2014)
Abhishek Bandyopadhyay, Ajanta Sarkar, Uma Bhattacharya, Monish Chatterjee
Improved algorithms for dynamic routing and wavelength assignment in WDM all-optical mesh networks. WOCN (2014)
Abhishek Bandyopadhyay, Michael Determan, Sejun Kim, Khiem Nguyen
A 120dB-SNR 100dB-THD+N 21.5mW/channel multibit CT ΔΣ DAC. ISSCC (2011)
Khiem Nguyen, Abhishek Bandyopadhyay, Bob Adams, Karl Sweetland, Paul Baginski
A 108dB SNR 1.1mW Oversampling Audio DAC with a Three-Level DEM Technique. ISSCC (2008)
Khiem Nguyen, Abhishek Bandyopadhyay, Bob Adams, Karl Sweetland, Paul Baginski
A 108 dB SNR, 1.1 mW Oversampling Audio DAC With A Three-level DEM Technique. IEEE J. Solid State Circuits 43 (12) (2008)
Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler
Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades. IEEE J. Solid State Circuits 41 (9) (2006)
Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler
MATIA: a programmable 80 WμW/frame CMOS block matrix transform imager architecture. IEEE J. Solid State Circuits 41 (3) (2006)
Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method. ISCAS (3) (2005)
Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler
A 80µW/frame 104×128 CMOS imager front end for JPEG compression. ISCAS (5) (2005)
Jungwon Lee, Abhishek Bandyopadhyay, I. Faik Baskaya, Ryan W. Robucci, Paul E. Hasler
Image processing system using a programmable transform imager. ICASSP (5) (2005)
Ravi Chawla, Abhishek Bandyopadhyay, Venkatesh Srinivasan, Paul E. Hasler
A 531 nW/MHz, 128×32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity. CICC (2004)
Abhishek Bandyopadhyay, Paul E. Hasler
A fully programmable CMOS block matrix transform imager architecture. CICC (2003)
Paul E. Hasler, Abhishek Bandyopadhyay, David V. Anderson
High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits. EURASIP J. Adv. Signal Process. 2003 (7) (2003)
Paul E. Hasler, Abhishek Bandyopadhyay, Paul D. Smith
A matrix transform imager allowing high-fill factor. ISCAS (3) (2002)