11th International Workshop on Network on Chip Architectures, NoCArc@MICRO 2018, Fukuoka, Japan, October 20, 2018

Published in: NoCArc@MICRO (2018)

Keyphrases

network on chip
selected papers
lecture notes
interconnection networks
routing algorithm
network simulator
computer science
packet switched
multi processor
international workshop
fault tolerant
power dissipation
multi core processors
high speed
parallel algorithm
low cost
scheduling problem