Numerical Validation in Current Hardware Architectures

Keyphrases

Publications

volume 5492, 2009

Numerical Validation in Current Hardware Architectures, International Dagstuhl Seminar, Dagstuhl Castle, Germany, January 6-11, 2008. Revised Papers Numerical Validation in Current Hardware Architectures 5492 (2009)

2008

Werner Hofschuster, Walter Krämer, Markus Neher
C-XSC and Closely Related Software Packages. Numerical Validation in Current Hardware Architectures (2008)
Mariana Luderitz Kolberg, Walter Krämer, Michael Zimmer
A Note on Solving Problem 7 of the SIAM 100-Digit Challenge Using C-XSC. Numerical Validation in Current Hardware Architectures (2008)
Ekaterina Auer, Wolfram Luther
Numerical Verification Assessment in Computational Biomechanics. Numerical Validation in Current Hardware Architectures (2008)
Michel Kieffer
Distributed parameter and state estimation in a network of sensors. Numerical Validation in Current Hardware Architectures (2008)
Stef Graillat, Jean Luc Lamotte, Diep Nguyen Hong
Error-Free Transformation in Rounding Mode toward Zero. Numerical Validation in Current Hardware Architectures (2008)
Markus Grimmer
Extending the Range of C-XSC: Some Tools and Applications for the Use in Parallel and Other Environments. Numerical Validation in Current Hardware Architectures (2008)
Jürgen Wolff von Gudenberg
Interval Arithmetic and Standardization. Numerical Validation in Current Hardware Architectures (2008)
R. Baker Kearfott, John D. Pryce, Nathalie Revol
Discussions on an Interval Arithmetic Standard at Dagstuhl Seminar 08021. Numerical Validation in Current Hardware Architectures (2008)
Markus Neher
The CoStLy C++ Class Library. Numerical Validation in Current Hardware Architectures (2008)
Eva Dyllong
Some Applications of Interval Arithmetic in Hierarchical Solid Modeling. Numerical Validation in Current Hardware Architectures (2008)
Ulrich W. Kulisch
Complete Interval Arithmetic and Its Implementation on the Computer. Numerical Validation in Current Hardware Architectures (2008)
Andreas Rauh, Johanna Minisini, Eberhard P. Hofer
Towards the Development of an Interval Arithmetic Environment for Validated Computer-Aided Design and Verification of Systems in Control Engineering. Numerical Validation in Current Hardware Architectures (2008)
Michael Zimmer, Walter Krämer
Fast (Parallel) Dense Linear Interval Systems Solvers in C-XSC Using Error Free Transformations and BLAS. Numerical Validation in Current Hardware Architectures (2008)
Di Jiang, Neil F. Stewart
Robustness of Boolean operations on subdivision-surface models. Numerical Validation in Current Hardware Architectures (2008)
Eva Dyllong
A Note on Some Applications of Interval Arithmetic in Hierarchical Solid Modeling. Numerical Validation in Current Hardware Architectures (2008)
Frithjof Blomquist, Werner Hofschuster, Walter Krämer
A Modified Staggered Correction Arithmetic with Enhanced Accuracy and Very Wide Exponent Range. Numerical Validation in Current Hardware Architectures (2008)
Annie A. M. Cuyt, Franky Backeljauw, Stefan Becuwe, Michel Colman, Tom Docx, Joris Van Deun
Continued Fractions for Special Functions: Handbook and Software. Numerical Validation in Current Hardware Architectures (2008)
Annie A. M. Cuyt, Walter Krämer, Wolfram Luther, Peter W. Markstein
08021 Summary - Numerical Validation in Current Hardware Architectures. Numerical Validation in Current Hardware Architectures (2008)
Mariana Luderitz Kolberg, Gerd Bohlender, Dalcidio Moraes Claudio
Improving the Performance of a Verified Linear System Solver Using Optimized Libraries and Parallel Computation. Numerical Validation in Current Hardware Architectures (2008)
Ekaterina Auer, Wolfram Luther
Numerical Verification Assessment in Computational Biomechanics. Numerical Validation in Current Hardware Architectures (2008)
Walter Krämer, Michael Zimmer
Fast (Parallel) Dense Linear System Solvers in C-XSC Using Error Free Transformations and BLAS. Numerical Validation in Current Hardware Architectures (2008)
Evgenija D. Popova
Mathematica Connectivity to Interval Libraries filib++ and C-XSC. Numerical Validation in Current Hardware Architectures (2008)
Paul Zimmermann
Implementation of the reciprocal square root in MPFR. Numerical Validation in Current Hardware Architectures (2008)
Markus Grimmer
Extending the Range of C-XSC: Some Tools and Applications for the use in Parallel and other Environments. Numerical Validation in Current Hardware Architectures (2008)
Mariana Luderitz Kolberg, Walter Krämer, Michael Zimmer
A Note on Solving Problem 7 of the SIAM 100-Digit Challenge Using C-XSC. Numerical Validation in Current Hardware Architectures (2008)
Werner Hofschuster, Walter Krämer, Markus Neher
C-XSC and Closely Related Software Packages. Numerical Validation in Current Hardware Architectures (2008)
Di Jiang, Neil F. Stewart
Robustness of Boolean Operations on Subdivision-Surface Models. Numerical Validation in Current Hardware Architectures (2008)
John D. Pryce, George F. Corliss, R. Baker Kearfott, Nedialko S. Nedialkov, Spencer Smith
Second Note on Basic Interval Arithmetic for IEEE754R. Numerical Validation in Current Hardware Architectures (2008)
Evgenija D. Popova
On the Interoperability between Interval Software. Numerical Validation in Current Hardware Architectures (2008)
Michel Kieffer
Distributed Bounded-Error Parameter and State Estimation in Networks of Sensors. Numerical Validation in Current Hardware Architectures (2008)
Frithjof Blomquist, Werner Hofschuster, Walter Krämer
A Modified Staggered Correction Arithmetic with Enhanced Accuracy and Very Wide Exponent Range. Numerical Validation in Current Hardware Architectures (2008)
Gregorio de Miguel Casado, Juan Manuel García Chamizo
A Software Library for Reliable Online-Arithmetic with Rational Numbers. Numerical Validation in Current Hardware Architectures (2008)
Wolfram Luther, Annie A. M. Cuyt, Walter Krämer, Peter W. Markstein
08021 Abstracts Collection - Numerical Validation in Current Hardware Architectures. Numerical Validation in Current Hardware Architectures (2008)
Andreas Rauh, Johanna Minisini, Eberhard P. Hofer
Towards the Development of an Interval Arithmetic Environment for Validated Computer-Aided Design and Verification of Systems in Control Engineering. Numerical Validation in Current Hardware Architectures (2008)
Ulrich W. Kulisch
Complete Interval Arithmetic and its Implementation. Numerical Validation in Current Hardware Architectures (2008)
Peter W. Markstein
The New IEEE-754 Standard for Floating Point Arithmetic. Numerical Validation in Current Hardware Architectures (2008)
Andreas Frommer, Valeria Simoncini
Error Bounds for Lanczos Approximations of Rational Functions of Matrices. Numerical Validation in Current Hardware Architectures (2008)

volume 8021, 2008

Numerical Validation in Current Hardware Architectures, 6.1. - 11.1.2008 Numerical Validation in Current Hardware Architectures 8021 (2008)