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Memory System Performance and Correctness
2006
2006
2006
Keyphrases
Publications
2006
Shoaib Kamil
,
Kaushik Datta
,
Samuel Williams
,
Leonid Oliker
,
John Shalf
,
Katherine A. Yelick
Implicit and explicit optimizations for stencil computations.
Memory System Performance and Correctness
(2006)
Lei Jin
,
Hyunjin Lee
,
Sangyeun Cho
A flexible data to L2 cache mapping approach for future multicore processors.
Memory System Performance and Correctness
(2006)
Mojtaba Mehrara
,
Todd M. Austin
Reliability-aware data placement for partial memory protection in embedded processors.
Memory System Performance and Correctness
(2006)
Benjamin Hindman
,
Dan Grossman
Atomicity via source-to-source translation.
Memory System Performance and Correctness
(2006)
Melissa E. O'Neill
,
F. Warren Burton
Smarter garbage collection with simplifiers.
Memory System Performance and Correctness
(2006)
Dan Grossman
,
Jeremy Manson
,
William Pugh
What do high-level memory models mean for transactions?
Memory System Performance and Correctness
(2006)
Jinzhan Peng
,
Guei-Yuan Lueh
,
Gansha Wu
,
Xiaogang Gou
,
Ryan N. Rakvic
A comprehensive study of hardware/software approaches to improve TLB performance for java applications on embedded systems.
Memory System Performance and Correctness
(2006)
Michael D. Adams
,
David S. Wise
Seven at one stroke: results from a cache-oblivious paradigm for scalable matrix algorithms.
Memory System Performance and Correctness
(2006)
Gregory Buehrer
,
Yen-Kuang Chen
,
Srinivasan Parthasarathy
,
Anthony D. Nguyen
,
Amol Ghoting
,
Daehyun Kim
Efficient pattern mining on shared memory systems: implications for chip multiprocessor architectures.
Memory System Performance and Correctness
(2006)
David A. Wood
Keynote talk challenges in chip multiprocessor memory systems.
Memory System Performance and Correctness
(2006)
Kunal Agrawal
,
Charles E. Leiserson
,
Jim Sukha
Memory models for open-nested transactions.
Memory System Performance and Correctness
(2006)
Proceedings of the 2006 workshop on Memory System Performance and Correctness, San Jose, California, USA, October 11, 2006
Memory System Performance and Correctness
(2006)
Mark Aiken
,
Manuel Fähndrich
,
Chris Hawblitzel
,
Galen C. Hunt
,
James R. Larus
Deconstructing process isolation.
Memory System Performance and Correctness
(2006)