Power-aware design with various low-power algorithms for an H.264/AVC encoder.
Hyun KimChae-Eun RheeJin-Sung KimSunwoong KimHyuk-Jae LeePublished in: ISCAS (2011)
Keyphrases
- low power
- power consumption
- power reduction
- digital signal processing
- high speed
- single chip
- power dissipation
- high power
- low power consumption
- low cost
- vlsi architecture
- low complexity
- logic circuits
- ultra low power
- power saving
- rate distortion
- computational complexity
- bit rate
- vlsi circuits
- gate array
- rate control
- macroblock
- cmos technology
- deblocking filter