A hierarchical three-way interconnect architecture for hexagonal processors.
Feng ZhouEsther Y. ChengBo YaoChung-Kuan ChengRonald L. GrahamPublished in: SLIP (2003)
Keyphrases
- parallel architecture
- hierarchical architecture
- high speed
- real time
- parallel processing
- multithreading
- instruction set
- management system
- software architecture
- multi layer
- processing elements
- multiprocessor architecture
- hexagonal grid
- memory hierarchy
- multi processor
- memory access
- parallel processors
- high performance computing
- hierarchical clustering
- hierarchical structure
- input output