Login / Signup

xpipes: a Latency Insensitive Parameterized Network-on-chip Architecture For Multi-Processor SoCs.

Matteo Dall'OssoGianluca BiccariLuca GiovanniniDavide BertozziLuca Benini
Published in: ICCD (2003)
Keyphrases
  • multi processor
  • network on chip
  • program execution
  • single processor
  • shared memory
  • multi core processors
  • data transfer
  • routing algorithm
  • distributed memory
  • high speed
  • network simulator
  • wireless sensor networks