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Exploiting symmetry when verifying transistor-level circuits by symbolic trajectory evaluation.

Manish PandeyRandal E. Bryant
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1999)
Keyphrases
  • high speed
  • model checking
  • levels of abstraction
  • low power
  • higher level
  • evaluation model
  • data mining
  • spatio temporal
  • evaluation method
  • integrated circuit
  • evaluation methods
  • trajectory data
  • power dissipation