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Reducing the Contention Experienced by Real-Time Core-to-I/O Flows over a Tilera-Like Network on Chip.
Laure Abdallah
Mathieu Jan
Jérôme Ermont
Christian Fraboul
Published in:
ECRTS (2016)
Keyphrases
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real time
network on chip
low cost
data transfer
packet switched
network simulator
high speed
signal processing
data acquisition
routing algorithm
embedded systems
multi processor