A low power unified cache architecture providing power and performance flexibility (poster session).
Afzal MalikBill MoyerDan CermakPublished in: ISLPED (2000)
Keyphrases
- low power
- poster session
- power consumption
- high power
- vlsi architecture
- power management
- cmos technology
- low cost
- multithreading
- high speed
- mixed signal
- single chip
- nm technology
- power reduction
- power dissipation
- student research workshop
- power saving
- logic circuits
- computational power
- wireless transmission
- real time
- vlsi circuits
- digital signal processing
- ultra low power
- energy dissipation
- data center
- signal processor
- delay insensitive
- memory subsystem
- memory access
- data management
- gate array