A compact ultra low-power pulse delay and extension circuit for neuromorphic processors.

Carsten Nielsen Ning Qiao Giacomo Indiveri

Published in: BioCAS (2017)

Keyphrases

ultra low power
low power
power dissipation
parallel algorithm
high speed
parallel processing
multiprocessor systems
power reduction
communication delays
low cost
shift register
neural network
power consumption
circuit design
cmos technology
logic circuits