An Implementation of a Grid Square Codes Generator on a RISC-V Processor.

Jubee Tada Keiichi Sato

Published in: Int. J. Netw. Comput. (2022)

Keyphrases

instruction set
computation intensive
application specific
shared memory multiprocessors
cellular automata
parallel processing
error correction
parallel architecture
hardware architecture
computer systems
binary images
floating point
central processing unit