Low Power Design for ASIC Cores.
Alvar DeanDavid GarrettMircea R. StanSebastian VentronePublished in: VLSI Design (2001)
Keyphrases
- low power
- single chip
- low cost
- power consumption
- low power consumption
- high speed
- vlsi architecture
- logic circuits
- design methodology
- gate array
- cmos technology
- circuit design
- digital signal processing
- power reduction
- cmos image sensor
- vlsi circuits
- mixed signal
- ultra low power
- power dissipation
- hardware architecture
- vlsi implementation
- wireless transmission
- physical design
- hardware implementation
- efficient implementation
- low complexity