29.6 A 660-to-676GHz 4×2 Oscillator-Radiator Array with Intrinsic Frequency-Filtering Feedback for Harmonic Power Boost Achieving 7.4dBm EIRP in 40nm CMOS.
Gabriel GuimaraesPatrick ReynaertPublished in: ISSCC (2020)
Keyphrases
- clock gating
- power consumption
- power dissipation
- low power
- cmos technology
- clock frequency
- power reduction
- power management
- silicon on insulator
- feedback loop
- power saving
- nm technology
- image sensor
- high speed
- focal plane
- relevance feedback
- filtering method
- filtering algorithm
- single chip
- digital signal processing
- digital camera
- chip design
- dielectric constant
- low cost