Login / Signup

VLSI Implementation of RISC-V MCU with a variable stage pipeline.

Mao-Hsu YenCheng-Hao TsouTzu-Feng LinYih-Hsia LinYuan-Fu KuChien-Ting Kao
Published in: ICKII (2023)
Keyphrases
  • vlsi implementation
  • low power consumption
  • vlsi architecture
  • low power
  • low cost
  • power consumption
  • application specific
  • fir filters
  • real time
  • filter bank
  • multiscale
  • computationally efficient