A Neural Stimulator with 11.4 V Voltage-Compliance Realized in a $0.18-\mu\mathrm{m}$ 3.3 V CMOS Technology.

Liwei Cao Xiao Liu

Published in: ISCAS (2023)

Keyphrases

low voltage
cmos technology
low power
spl times
power consumption
neural network
random access memory
design considerations
parallel processing
image sensor
power management
pattern recognition
mixed signal
high speed
low cost
power dissipation
hidden markov models
computer vision