Surmounting Challenges in the Design of Low Power Real Time Clock IP for Advanced FinFET Technology Nodes.
Krishnan SukumarSantosh VodnalaRavindra AyyagariAnimesh JainThanapandi GanesanRajesh RPublished in: VLSID (2023)
Keyphrases
- low power
- high speed
- power consumption
- vlsi architecture
- low power consumption
- gate array
- low cost
- cmos technology
- real time
- nm technology
- single chip
- logic circuits
- digital signal processing
- power dissipation
- mixed signal
- wireless transmission
- low complexity
- power reduction
- vlsi implementation
- high power
- vlsi circuits
- signal processor
- ultra low power
- power saving
- quality of service
- wireless networks
- image processing