Optimization of device dimensions for high-performance low-power architecture blocks.
Tobias GemmekeMichael GansenThomas G. NollHeinrich J. StockmannsPublished in: ESSCIRC (2003)
Keyphrases
- low power
- signal processor
- vlsi architecture
- power consumption
- low power consumption
- low cost
- high speed
- cmos technology
- mixed signal
- high power
- single chip
- ultra low power
- real time
- nm technology
- wireless transmission
- vlsi circuits
- logic circuits
- signal processing
- power reduction
- vlsi implementation
- hardware and software
- delay insensitive
- digital signal processing
- cmos image sensor
- general purpose
- gate array
- image processing