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Algorithms and architecture of a VLSI signal processor for ANSI standard ISDN transceiver.

Taiho KohOscar E. AgazziS. S. HaiderR. W. WaldenDaniel R. CassidayGene A. WilsonT. Mariano LalumiaChristine M. GerveshiM. R. DwarakanathJ. KumarRonald E. CrochiereR. F. ShawR. A. Wilson IIIW. R. McDonaldN. L. GottfriedN. S. RameshM. L. HeisakanenR. B. Blake Jr.
Published in: ICASSP (1989)
Keyphrases
  • data structure
  • computational complexity
  • single chip
  • real time
  • signal processor
  • neural network
  • learning algorithm
  • computer systems
  • efficient implementation