Custom Low Power Processor for Polar Decoding.
Mathieu LéonardonCamille LerouxDavid BinetJ. M. Pierre LangloisChristophe JégoYvon SavariaPublished in: ISCAS (2018)
Keyphrases
- low power
- single chip
- high speed
- gate array
- power consumption
- low cost
- high power
- logic circuits
- wireless transmission
- decoding algorithm
- digital signal processing
- frequency domain
- image sensor
- low power consumption
- power reduction
- application specific
- vlsi circuits
- low density parity check
- cmos technology
- vlsi architecture
- image transmission
- mixed signal
- delay insensitive
- digital camera