A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition.
Xing WeiHaigang YangWei LiZhihong HuangTao YinLe YuPublished in: Integr. (2019)
Keyphrases
- floating point
- instruction set
- sparse matrices
- tree decomposition
- fixed point
- fast fourier transform
- floating point unit
- floating point arithmetic
- computer architecture
- graphics processing units
- decomposition method
- social networks
- branch and bound
- power consumption
- memory management
- answer set programming
- fourier transform
- low cost