Performance Evaluation of the AV CODEC on a Low-Power SPXK5SC DSP Core.
Takahiro KumuraNorio KayamaShinichi ShionoyaKazuo KumagiriTakao KusanoMakoto YoshidaMasao IkekawaIchiro KurodaTakao NishitaniPublished in: IEICE Trans. Inf. Syst. (2005)
Keyphrases
- low power
- digital signal processing
- high speed
- low cost
- power consumption
- single chip
- high power
- wireless transmission
- vlsi circuits
- low power consumption
- gate array
- vlsi architecture
- video coding
- signal processing
- image sensor
- video codec
- logic circuits
- power reduction
- real time
- power dissipation
- cmos technology
- coding method
- inter frame
- motion estimation