Implementation of Zero Tree Wavelet coders in DSP Processor.
Arivazhagan SelvarajD. GnanaduraiJ. R. Antony VanceK. M. SarojiniL. GanesanPublished in: Int. J. Wavelets Multiresolution Inf. Process. (2004)
Keyphrases
- high speed
- image coder
- efficient implementation
- image compression
- tree structure
- signal processing
- bit rate
- transform coding
- cell broadband engine architecture
- multiresolution
- wavelet image coding
- bit plane
- wavelet decomposition
- rate distortion
- parallel processing
- image coding
- computer architecture
- video coding
- parallel architecture
- wavelet coefficients
- digital signal processor
- digital signal
- wavelet tree
- systolic array
- standard test images
- subband
- wavelet transform