A low-power correlation-derivative CMOS VLSI circuit for bearing estimation.
Pedro JuliánAndreas G. AndreouDavid H. GoldbergPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2006)
Keyphrases
- low power
- high speed
- power dissipation
- vlsi circuits
- gate array
- power consumption
- cmos technology
- single chip
- low cost
- mixed signal
- logic circuits
- vlsi architecture
- delay insensitive
- power reduction
- real time
- digital signal processing
- chip design
- wireless transmission
- nm technology
- low power consumption
- image sensor
- high power
- cmos image sensor
- ultra low power