Login / Signup
VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application.
Jing Li
Ran Li
Ting Yi
Zhiliang Hong
Bill Yang Liu
Published in:
ASICON (2011)
Keyphrases
</>
low power
high speed
vlsi architecture
vlsi implementation
power consumption
low cost
image sensor
ultra low power
fir filters
sigma delta
real time
neural network
image processing
pattern recognition
multiresolution