Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor.

Jinbo Xu Weixia Xu Kefei Wang Zhengbin Pang

Published in: IPCCC (2014)

Keyphrases

low latency
multi processor
high bandwidth
high speed
multi core processors
processor core
low cost
highly efficient
multithreading
high throughput
virtual machine
single processor
program execution