Comparative Study on 4-Bit Adders and Multipliers with Hardware Implementation.
Sabitabratta BhattacharyaS. Lakshmi NarasimhanRohanth Hari MPublished in: ICDCS (2024)
Keyphrases
- comparative study
- hardware implementation
- bit parallel
- shift register
- pattern matching
- fpga device
- signal processing
- efficient implementation
- field programmable gate array
- programmable logic
- xilinx virtex
- software implementation
- hardware design
- fpga implementation
- dedicated hardware
- image processing algorithms
- hardware architecture
- regular expressions
- memory management
- multiple valued
- parallel architecture
- real time
- image binarization
- pipeline architecture
- pipelined architecture