High-Performance VLSI Architecture of H.264/AVC CAVLD by Parallel Run_before Estimation Algorithm.

Jongwoo Bae Jinsoo Cho

Published in: J. Inf. Sci. Eng. (2013)

Keyphrases

estimation algorithm
vlsi architecture
low complexity
vlsi implementation
mode decision
computationally efficient
low power
maximum likelihood
real time
computational complexity
motion estimation
video streams
rate control
rate distortion
bitstream
coding efficiency
bit rate
computer architecture
high quality