Specification and verification of inter-component constraints in CTL.
Nguyen Truong ThangTakuya KatayamaPublished in: SAVCBS@ESEC/FSE (2005)
Keyphrases
- model checking
- formal verification
- formal specification
- bounded model checking
- temporal logic
- transition systems
- linear temporal logic
- model checker
- asynchronous circuits
- constraint programming
- neural network
- formal methods
- computation tree logic
- concurrent systems
- temporal properties
- reactive systems
- linear constraints
- symbolic model checking
- global constraints
- constrained optimization
- constraint satisfaction
- epistemic logic
- face verification
- verification method
- description logics
- high level