A novel conflict-free memory and processor architecture for DVB-T2 LDPC decoding.
Alberto Jimenez-PachecoOnkar DabeerPublished in: ICUMT (2011)
Keyphrases
- conflict free
- memory management
- processing elements
- memory access
- memory hierarchy
- ldpc codes
- decoding algorithm
- level parallelism
- memory subsystem
- low density parity check
- single instruction multiple data
- parallel architecture
- multithreading
- instruction set
- functional dependencies
- argumentation frameworks
- error correction
- video decoder
- database
- database schemes
- hardware implementation
- multivalued dependencies
- coding scheme
- management system
- state space