Login / Signup
DSSA: Dual-Side Sparse Systolic Array Architecture for Accelerating Convolutional Neural Network Training.
Zhengbo Chen
Qi Yu
Fang Zheng
Feng Guo
Zuoning Chen
Published in:
ICPP (2022)
Keyphrases
</>
systolic array
neural network training
parallel architecture
data flow
reconfigurable architecture
neural network
sparse coding
training algorithm
parallel processing
data sets
machine learning
pattern recognition
multi objective
back propagation
optimization method
learning rate