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A 600-MHz superscalar floating-point processor.
John Clouser
Mark Matson
R. Badeau
R. Dupcak
Sridhar Samudrala
Randy L. Allmon
N. Fairbanks
Published in:
IEEE J. Solid State Circuits (1999)
Keyphrases
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instruction set
floating point
fixed point
high speed
square root
floating point arithmetic
fast fourier transform
sparse matrices
interval arithmetic
level parallelism