A Back-Gate-Input Clocked Comparator with Improved Speed and Reduced Noise in 22-nm SOI CMOS.
Haoyu ZhuangHe TangXizhu PengYuefeng LiPublished in: ISCAS (2021)
Keyphrases
- cmos technology
- silicon on insulator
- low power
- high speed
- nm technology
- power consumption
- power dissipation
- input data
- metal oxide semiconductor
- low cost
- low voltage
- vlsi circuits
- noise reduction
- noisy data
- real time
- noise level
- noise model
- random noise
- single chip
- digital signal processing
- additive noise
- signal to noise ratio
- missing data