A high performance and low power hardware architecture for the transform & quantization stages in H.264.
Muhsen OwaidaMaria G. KoziriIoannis KatsavounidisGeorgios I. StamoulisPublished in: ICME (2009)
Keyphrases
- low power
- hardware architecture
- low power consumption
- signal processor
- power consumption
- low cost
- high speed
- field programmable gate array
- hardware implementation
- transform coefficients
- single chip
- hardware architectures
- associative memory
- digital signal processing
- vlsi circuits
- transform domain
- real time
- embedded systems
- parallel algorithm
- computer systems
- mixed signal