Low power DCT using highly scalable multipliers.
Ricardo CastellanosHari KalvaRavi ShankarPublished in: ICIP (2009)
Keyphrases
- highly scalable
- low power
- power consumption
- high speed
- low cost
- discrete cosine transform
- single chip
- digital signal processing
- transform domain
- dct coefficients
- high power
- low power consumption
- data partitioning
- image compression
- vlsi architecture
- low bit rate
- vlsi circuits
- wireless transmission
- filter bank
- logic circuits
- image sensor
- dct domain
- jpeg images
- real time
- power reduction
- gate array
- mixed signal
- frequency domain
- ultra low power