Low Power and Area-Efficient Hybrid Adder for ALU Operation.

Shilpa Sikdar Trilochan Panigrahi

Published in: iSES (2023)

Keyphrases

low power
low cost
power consumption
logic circuits
high speed
single chip
high power
gate array
real time
cmos technology
low power consumption
power dissipation
vlsi circuits
wireless transmission
power reduction
vlsi architecture
error correction
efficient implementation
general purpose