A 12 bit 150 MS/s 1.5 mW SAR ADC with adaptive radix DAC in 40 nm CMOS.

Kwuang-Han Chang Chih-Cheng Hsieh

Published in: A-SSCC (2016)

Keyphrases

analog to digital converter
power consumption
power supply
hd video
nm technology
bit parallel
cmos technology
low cost
low power
high speed
random access memory
parameter estimation
high definition
sar images
sar imagery
delay insensitive
circuit design
regular expressions