A Highly Parallel FPGA Implementation of Sparse Neural Network Training.
Sourya DeyDiandian ChenZongyang LiSouvik KunduKuan-Wen HuangKeith M. ChuggPeter A. BeerelPublished in: CoRR (2018)
Keyphrases
- highly parallel
- fpga implementation
- neural network training
- hardware implementation
- efficient implementation
- neural network
- training algorithm
- field programmable gate array
- parallel architectures
- computing systems
- single pass
- single chip
- optimization method
- parallel programming
- particle swarm optimisation
- transfer function
- support vector machine
- evolutionary algorithm
- back propagation
- markov random field