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A piecewise-linear 10b DAC architecture with drain-current modulation for compact AMLCD driver ICs.

Yong-Joon JeonHyung-Min LeeSungwoo LeeGyu-Hyeong ChoHyoung-Rae KimYoon-Kyung ChoiMyunghee Lee
Published in: ISSCC (2009)
Keyphrases
  • piecewise linear
  • dynamic programming
  • chaotic map
  • finite sets
  • data sets
  • support vector
  • active learning
  • binary variables
  • principal curves