Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning.
Minghua ShenGuojie LuoPublished in: FCCM (2017)
Keyphrases
- routing protocol
- field programmable gate array
- hardware implementation
- routing problem
- high speed
- load balance
- routing algorithm
- low cost
- real time image processing
- partitioning algorithm
- parallel processing
- ad hoc networks
- network topologies
- mobile ad hoc networks
- network topology
- signal processing
- real time
- digital signal
- fpga hardware
- verilog hdl
- shortest path
- neural network
- data sets
- distributed memory
- parallel architecture
- end to end
- traffic engineering
- data acquisition
- fpga implementation
- clustering algorithm
- systolic array
- gate array