Local-and-global stall mechanism for systolic computational-memory array on extensible multi-FPGA system.
Luzhou WangKentaro SanoSatoru YamamotoPublished in: FPT (2010)
Keyphrases
- systolic array
- computational power
- programmable logic
- high speed
- memory space
- data flow
- computing power
- low cost
- parallel hardware
- random access memory
- object oriented
- internal memory
- limited memory
- data types
- real time
- markup language
- field programmable gate array
- mathematical programming
- low power
- parallel architecture
- fpga implementation
- computational models
- linear array
- efficient implementation
- memory requirements