AMSNet: Netlist Dataset for AMS Circuits.

Zhuofu Tao Yichen Shi Yiru Huo Rui Ye Zonghang Li Li Huang Chen Wu Na Bai Zhiping Yu Ting-Jung Lin Lei He

Published in: CoRR (2024)

Keyphrases

delay insensitive
logic synthesis
real time
high speed
training dataset
benchmark datasets
synthetic datasets