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A Lightweight Slave-Module Interface Core to Implement IEEE 1149.5 MTM-Bus Based on FPGA.
Yalong Pang
Shuai Jiang
Lu-yuan Wang
Weiwei Liu
Ji-yang Yu
Yuehua Niu
Published in:
ASICON (2019)
Keyphrases
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lightweight
high speed
verilog hdl
communication infrastructure
master slave
hardware implementation
user interface
wireless sensor networks
low cost
dos attacks
signal processing
rfid tags
field programmable gate array
fpga device
hardware design