Low power sum of absolute differences architecture using novel hybrid adder.
Rafael FerreiraBianca SilveiraMateus Beck FonsecaCláudio Machado DinizEduardo A. C. da CostaPublished in: LASCAS (2017)
Keyphrases
- low power
- vlsi architecture
- logic circuits
- low cost
- power consumption
- high speed
- power dissipation
- cmos technology
- sum of absolute differences
- stereo matching
- mixed signal
- nm technology
- single chip
- wireless transmission
- vlsi circuits
- data flow
- image sensor
- signal processor
- real time
- high power
- digital signal processing
- power reduction
- gate array
- low power consumption
- cmos image sensor
- block matching
- wireless networks
- three dimensional
- image processing