A GALS FFT processor with clock modulation for low-EMI applications.

Xin Fan Milos Krstic Christoph Wolf Eckhard Grass

Published in: ASAP (2010)

Keyphrases

high speed
frequency domain
fourier transform
high levels
fast fourier transform
learning bayesian networks
real time
power consumption
parallel processing
computer architecture
bayesian networks
multiresolution
low power
parallel processors